Janak H Patel

Professor Emeritus · Institute of Technology

University of Illinois Urbana-Champaign · United States

VLSI Testing and Testability, VLSI Design AutomationComputer aided designComputer aided design of integrated circuitsComputer architectureDigital integrated circuitsHardware systemsHardware verification and testingLogic design and VLSI

简介

Patel’s research contributions include Pipeline Scheduling, Cache Coherence, Cache Simulation, Cache Data Prefetch, Multiprocessor memory modeling and analysis, Interconnection Networks, On-line Error Detection, Reliability analysis of memories with ECC and Scrubbing, Design for Testability, Built-In Self-Test, Fault Simulation and Automatic Test Generation. Patel is the inventor of the well known Illinois Cache Coherence Protocol and Illinois Scan Architecture, both are used heavily in most modern microprocessors. In addition, his Stride Prediction based Data Prefetch is the basis for nearly all data prefetch techniques used in most current microprocessors. Patel has supervised over 85 M.S. and Ph.D. theses and published over 200 technical papers. During his academic stay at Illinois, Pat

教育经历

PhD - Electrical Engineering, Stanford University 1976
MS - Electrical Engineering, Stanford University 1971
B. Tech - Electrical Engineering, Indian Institute of Technology, Madras, India 1970
BS - Physics, Gujarat University, India 1967

数据校验于 9/6/2026数据来源

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还没有评价。成为第一位分享经验的学生吧。