Andrew Douglas Hilton

About

Drew Hilton is a Professor of the Practice in Electrical and Computer Engineering, as well as Pratt’s Director of Innovation in Computing Education. His main focus is on teaching professional-level programming skills to ECE’s master's students to prepare them for software engineering careers. Professor Hilton also teaches a 3-week introduction to Programming Python for Duke's Master in Interdisciplinary Data Science, and Duke's Center for Computational Thinking. He has two Coursera specializations, one in Java, and another in C.

Education

• Ph.D. University of Pennsylvania, 2010
• Professor of the Practice in the Department of Electrical and Computer Engineering
• Professor of the Practice in the Social Science Research Institute
• Professor of the Practice of Computer Science

Selected publications

• Huang Z, Joao JA, Rico A, Hilton AD, Lee BC. DynaSprint: Microarchitectural sprints with dynamic utility and thermal management. In: Proceedings of the Annual International Symposium on Microarchitecture Micro. 2019. p. 426u201339.
• Hilton AD, Lipp GM, Rodger SH. Translation from Problem to Code in Seven Steps. In: Comped 2019 Proceedings of the ACM Conference on Global Computing Education. 2019. p. 78u201384.
• Hilton AD, Lipp GM, Rodger SH. A technique for translation from problem to code. In: Annual Conference on Innovation and Technology in Computer Science Education Iticse. 2018. p. 375.
• Lehman TS, Hilton AD, Lee BC. MAPS: Understanding Metadata Access Patterns in Secure Memory. In: Proceedings 2018 IEEE International Symposium on Performance Analysis of Systems and Software Ispass 2018. 2018. p. 33u201343.
• Jacobvitz AN, Hilton AD, Sorin DJ. Multi-program benchmark definition. In: Ispass 2015 IEEE International Symposium on Performance Analysis of Systems and Software. 2015. p. 72u201382.
• Battle S, Hilton AD, Hempstead M, Roth A. Flexible register management using reference counting. In: Proceedings International Symposium on High Performance Computer Architecture. 2012. p. 273u201384.
• Hilton A, Nagarakatte S, Roth A. ICFP: Tolerating all-level cache misses in in-order processors. IEEE Micro. 2010 Jan 1;30(1):12u20139.
• Hilton A, Roth A. SMT-directory: Efficient load-load ordering for SMT. IEEE Computer Architecture Letters. 2010 Jan 1;9(1):25u20138.
• Hilton A, Roth A. BOLT: Energy-efficient out-of-order latency-tolerant execution. In: Proceedings International Symposium on High Performance Computer Architecture. 2010.
• Hilton A, Roth A. Decoupled store completion/silent deterministic replay: Enabling scalable data memory for CPR/CFP processors. In: Proceedings International Symposium on Computer Architecture. 2009. p. 245u201354.