Michael Huang

About

Michael Huang received the BS degree in computer science and engineering from Tsinghua University, Beijing, in 1994, the MS and the PhD degree in computer science from University of Illinois at Urbana-Champaign in 1999 and 2002, respectively. From 1994 to 1997, he was a lead architect in building a 32-processor hierarchical shared-memory multiprocessor. He joined the faculty of the Electrical and Computer Engineering department in 2002. His research interests include various aspects of high-performance computer architecture such as processor microarchitecture, communication and memory substrate, reliability, and energy-efficient and complexity-effective design. His research focuses on addressing emerging issues and exploring new technologies in the underlying device, circuit, and manufactu

Selected publications

• Increasing Ising Machine Capacity with Multi-Chip Architectures, Anshujit Sharma, Richard Afoakwa, Zeljko Ignjatovic, and Michael Huang, Proceedings of the 49th International Symposium on Computer Architecture, Jun. 2022
• BRIM: Bistable Resistively-Coupled Ising Machine, Richard Afoakwa, Yiqiao Zhang, Uday Kumar Reddy Vengalam, Zeljko Ignjatovic, and Michael Huang, Proceedings of the 27thInternational Symposium on High-Performance Computer Architecture, Feb./Mar. 2021
• Bootstrapping: Using SMT Hardware to Improve Single-Thread Performance, Sushant Kondguli and Michael Huang, Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems, Apr. 2019
• Division of Labor: A More Effective Approach to Prefetching, Sushant Kondguli and Michael Huang, Proceedings of the 45th International Symposium on Computer Architecture, June 2018